VLSI backend & Design engineer

Job description:

VLSI backend engineer (synthesis, Floorplan, IO ring, P&R, post layout, signoff) – we are looking for an experienced and versatile engineer that can primarily focus on backend design but also can perform logic design for area/power-sensitive SOC chips.

Required Experience:

5+ years of chip design development

Experience in backend development from synthesis to timing closure and fullchip signoff using advanced tools (Cadence, Synopsys, Magma) – must. Cadence tools (RC, FE and Conformal) preferred

Logic design experience – advantage

Required Skills:

Extensive knowledge of a major backend tool

Knowledge in Verilog is a must

Knowledge of a scripting language (Perl or similar)

Flexibility - willing to do both backend & logic design according to project needs

Quick learner

Independent, with capabilities to lead the backend activity

Good communications skills

Required Education:

BSEE/MSEE

中文内容：

职位描述：VLSI 后端工程师（综合、布局规划 Floorplan、IO 环、布局布线 P&R、后版图、签核 Signoff）——招聘一名经验丰富、能力全面的工程师，主要专注于后端设计，同时能在面积/功耗敏感的 SoC 芯片中承担逻辑设计。

经验要求：5 年以上芯片设计开发经验；必须具备从综合到时序收敛、全芯片签核的后端开发经验（Cadence、Synopsys、Magma 等先进工具），熟悉 Cadence 工具（RC、FE、Conformal）者优先；有逻辑设计经验者优先。

技能要求：精通主流后端工具；必须掌握 Verilog；熟悉 Perl 等脚本语言；能根据项目需要灵活承担后端与逻辑设计工作；学习能力强；能独立主导后端工作；良好的沟通能力。

学历要求：电子工程学士/硕士（BSEE/MSEE）。

Embedded SW Engineer

Job brief

We are looking for an experienced Embedded Software Engineer to execute complete software development lifecycle

Responsibilities

• Design, develop, code, test and debug embedded software
• Interface with hardware design and development

Requirements

• 3+ years of experience in embedded/firmware software engineering
• BS degree in Computer Science or Engineering
• Experience in hands-on development and troubleshooting on embedded targets
• Solid programming experience in C
• Proven experience in embedded systems design with RTOS
• Familiarity with software configuration management tools and defect tracking tools
• Adequate knowledge of reading schematics and data sheets for components
• Strong documentation and writing skills
• Knowledge in Linux drivers development – advantage
• Experience in Android/iOS development - advantage

中文内容：

职位简介：招聘一名经验丰富的嵌入式软件工程师，负责完整的软件开发生命周期。

岗位职责：设计、开发、编码、测试和调试嵌入式软件；与硬件设计开发对接。

任职要求：3 年以上嵌入式/固件软件工程经验；计算机科学或工程专业本科学历；具备嵌入式目标平台的实际开发与调试经验；扎实的 C 语言编程功底；有基于 RTOS 的嵌入式系统设计经验；熟悉软件配置管理工具与缺陷跟踪工具；能阅读元器件原理图与数据手册；良好的文档撰写能力；熟悉 Linux 驱动开发者、有 Android/iOS 开发经验者优先。

VLSI Designer

VLSI designer with knowledge and experience in chip design flow (Design, Verification, silicon validation) – we are looking for an experienced engineers that can quickly join a group of experienced engineers and contribute to a complex and area/power-sensitive SOC chip.

Required Experience:

• 3-5 years of chip design development
• Experience in logic design, verification and debug
• Knowledgeable in frontend design tools, Cadence based – preferred
• Experience in wireless and/or broadcast systems (WiFi, Bluetooth, GPS, DVB-T, etc.) – an advantage

Required Skills:

• Strong technical skills
• Quick learner
• Independent
• Good communications skills
• Extensive knowledge in Verilog is a must
• Knowledge in VHDL – an advantage
• Knowledge in advanced verification methodologies (specman, system Verilog) – an advantage

Required Education:

• BSEE/MSEE

中文内容：

职位描述：招聘具备芯片设计流程（设计、验证、硅片验证）知识与经验的 VLSI 设计师，能够快速加入经验丰富的工程师团队，为复杂且面积/功耗敏感的 SoC 芯片贡献力量。

经验要求：3-5 年芯片设计开发经验；有逻辑设计、验证与调试经验；熟悉 Cadence 前端设计工具者优先；有无线/广播系统（WiFi、蓝牙、GPS、DVB-T 等）经验者优先。

技能要求：技术功底扎实；学习能力强；独立自主；沟通能力良好；必须精通 Verilog；熟悉 VHDL 者优先；掌握先进验证方法学（Specman、SystemVerilog）者优先。

学历要求：电子工程学士/硕士（BSEE/MSEE）。