VLSI backend & Design engineer

Job description:

VLSI backend engineer (synthesis, Floorplan, IO ring, P&R, post layout, signoff) – we are looking for an experienced and versatile engineer that can primarily focus on backend design but also can perform logic design for area/power-sensitive SOC chips.

Required Experience:

5+ years of chip design development

Experience in backend development from synthesis to timing closure and fullchip signoff using advanced tools (Cadence, Synopsys, Magma) – must. Cadence tools (RC, FE and Conformal) preferred

Logic design experience – advantage

Required Skills:

Extensive knowledge of a major backend tool

Knowledge in Verilog is a must

Knowledge of a scripting language (Perl or similar)

Flexibility - willing to do both backend & logic design according to project needs

Quick learner

Independent, with capabilities to lead the backend activity

Good communications skills

Required Education:

BSEE/MSEE

Embdded Sw Engineer

Job brief

We are looking for an experienced Embedded Software Engineer to execute complete software development lifecycle

Responsibilities

• Design, develop, code, test and debug embedded software
• Interface with hardware design and development

Requirements

• 3+ years of experience in embedded/firmware software engineering
• BS degree in Computer Science or Engineering
• Experience in hands-on development and troubleshooting on embedded targets
• Solid programming experience in C
• Proven experience in embedded systems design with RTOS
• Familiarity with software configuration management tools and defect tracking tools
• Adequate knowledge of reading schematics and data sheets for components
• Strong documentation and writing skills
• Knowledge in Linux drivers development – advantage
• Experience in Android/iOS development - advantage

VLSI Designer

VLSI designer with knowledge and experience in chip design flow (Design, Verification, silicon validation) – we are looking for an experienced engineers that can quickly join a group of experienced engineers and contribute to a complex and area/power-sensitive SOC chip.

Required Experience:

• 3-5 years of chip design development
• Experience in logic design, verification and debug
• Knowledgeable in frontend design tools, Cadence based – preferred
• Experience in wireless and/or broadcast systems (WiFi, Bluetooth, GPS, DVB-T, etc.) – an advantage

Required Skills:

• Strong technical skills
• Quick learner
• Independent
• Good communications skills
• Extensive knowledge in Verilog is a must
• Knowledge in VHDL – an advantage
• Knowledge in advanced verification methodologies (specman, system Verilog) – an advantage

Required Education:

• BSEE/MSEE